Notes on the AGX Server : XF86Config
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5. XF86Config

Device Section Entries and Options Currently Supported:

The minimum that must be specified in the XF86Config device section for the AGX-014, AGX-015, AGX-016, and ISA-based XGA-1 and XGA-2 is the Chipset. However to get full capability out of the AGX-01[456] chips, the RAMDAC should be specified. Other parms may select additional capabilities, or may used to override the defaults or reduce start-up time be suppressing probing. XGA specific configuration is covered at the end of this document. The XGA entries can generally be used to override defaults for the AGX-01[456] as well.


Be sure to check the clock rating of the RAMDAC(s) on your video board and don't exceed that rating even if the server allows it, overclocking RAMDACs will damage them.

The clock rating generally appears as a suffix to the part number, may only have the most significant digit(s), and may be mixed with other codes (e.g. package type). For example, an 85MHz Bt481 in a plastic J-lead package has a part number of Bt481KPJ85 and a 135MHz AT&T20C505 has a part number of ATT20C505-13. Sierra stamps the rated speed below the part numbers in a dark ink.


normal VGA style RAMDAC (6-bit DAC), default if none specified. Most boards should work with this parm, but some capabilities will be unavailable. Only 8bpp is available.


bt481 RAMDAC (supports 8-bit DAC)


bt482 RAMDAC (supports 8-bit DAC) The Hercules Graphite HG210 uses the BT481 or BT482, the only difference between these two is the BT482's HW cursor (not yet supported). The BT481/2 are limited to 85Mhz. 8bpp, 15bpp, 16bpp are supported.


AT&T490 RAMDAC (includes 49[123] - supports 8-bit DAC). Limited to 110Mhz at 8bpp. 8bpp, 15bpp, and 16bpp are supported.


Sierra SC15025 and SC15021 RAMDAC (support 8-bit DAC). The SC15025 is limited to 125Mhz, and the SC15021 135Mhz. Check the RAMDAC's actual rating, some SC15025's used in AGX based boards are only rated to 110Mhz. 8bpp, 15bpp, and 16bpp are supported.


Hercules Graphite Pro RAMDAC probe. If the 84-pin Big-RAMDAC is installed (2MB models), will use the Big RAMDAC, but only clocks-doubled, pixel- multiplexed modes (higher clock values only!). Lower clocks and resolutions in 8bpp mode are supported by switching to the Small 44-pin RAMDAC. 15bpp and 16bpp are supported.

There has been one report of the "dac-8-bit" option not working with a Graphite Pro equipped with a BT485 RAMDAC, puzzling since it should be identical to the AT&T20C505 in this regard. No startup messages or XF86Config were submitted to aid problem isolation.

Not supported by the HG210 Graphite.


Hercules Graphite Pro RAMDAC probe. Forces use of only the BT481/482 RAMDAC. 8bpp, 15bpp, 16bpp, and unpacked 24/32bpp are supported.

Not supported by the HG210 Graphite.


To allow overriding the default VGA style RAMDAC control for the AGX-010.

Ramdac related Option Flags:


Sets RAMDAC to VGA default 6-bit DAC mode (default for "normal").


Sets supported RAMDAC's to 8-bit DAC mode (default for all but "normal").


Composite sync on green for RAMDAC's that support this feature (BT481/481 and AT&T20c490). However, whether any boards have necessary traces and glue logic is doubtful.


Must be specified, possible values: "AGX-016", "AGX-015", "AGX-014", "AGX-010", "XGA-2", or "XGA-1". Some AGX vendors place stickers over the chip, in general, if it's a VLB board it's probably an AGX-015 and if it's an ISA board it may be an AGX-014. The Hercules Graphite Power Pro and Spider Black Widow Plus use the AGX-016 chipset. In general, specifying a lower revision in the AGX-0{14,15,16} series does not seem to causes problems (except lower performance from the AGX-014's non-accelerated line drawing).

Note: Only the AGX-016, AGX-015, AGX-014 and XGA-2 have had any testing. Most of the development has been with an AGX-015 based 2MB Hercules Graphite VL PRO (HG720) and most of testers for previous releases had AGX-014 based 1MB Hercules Graphite (HG210).

The limited documentation I have for the AGX-010 is that is is a clone of the XGA architecture with a few additional configuration registers. What is not clear is whether to use XGA or extended-VGA RAMDAC control registers. The post-3.1.1 default is now VGA control registers, but XGA control registers can be forced with the XGA RAMDAC parm. Likewise the configuration parms described in the XGA section can be used to override the AGX defaults for I/O and memory addresses.


Will be probed if not specified. The startup will be a little faster if specified.

Tuning Option flags:

Bus I/O interface:


Force 8-bit I/O bus.

"wait_state", "no_wait_state"

Set or clear CPU access wait state, default is the POST setting.


Disable Memory I/O Buffer, AGX-015 and AGX-016. MS-Windows driver default. Required by some VLB systems with `aggressive timing'. The default for this server is to disable the buffer.


Enable the AGX-015/016's Memory I/O buffer.


Enable the AGX-016's extra-large buffer. Either option may result in garbage being left about the screen, disabled by default. A good test is the xbench or x11perf dashed lines tests, if random dots are drawn, fifo_conserv is required. So far, no boards have been reported that worked correctly with the buffers enabled.

Memory Timing:

POST defaults should be ok.

"vram_delay_latch", "vram delay_ras", "vram_extend_ras"

Vram timing options.

"slow_vram", "slow_dram"

Set all of the vram timing options.


Set vram latch delay, clear others.

"fast_vram", "fast_dram"

All of the vram timing options are cleared. Should be specified if directly specifying VRAM options in order to clear POST settings.


These shouldn't generally be required:


(AGX,XGA) Disable Font Cache.


(AGX) Force XGA mode CRTC delay.


AGX-015 only? adds additional VLB wait state.

"vram_128", "vram_256"

Sets VRAM shift frequency, vram_128 is for 128Kx8 VRAM. Default is to leave this bit unchanged from POST setting.

"refresh_20", "refresh_25"

Number of clock cycles between screen refreshes. Default is to leave this bit unchanged from POST setting.


Disable screen refresh during non-blanked intervals, AGX-016. Default is leave them enabled.

"vlb_a", "vlb_b"

VLB transaction type, default is to leave this bit unchanged from POST value.

Virtual resolution:

The server now accepts any virtual width, however the actual usable CRTC line width is restricted when using the graphics engine and depends upon the chip revision. The CRTC line width and not the virtual width determine the amount of memory used. The server currently does not make use of any of the unused CRTC line's memory. CRTC line width is restricted by the following rules:

AGX-014 : 512, 1024 and 2048. (also AGX-010)
AGX-015 : 512, 1024, 1280, and 2048.
AGX-016 : 512, 640, 800, 1024, 1280, and 2048.
XGA,AGX-010 : 512, 640, 800, 1024, 1280, 1152, and 2048.

When panning I occasionally get streaks if the virtual resolution is much greater than the physical resolution. Moving the mouse a little makes it disappear. The Hercules manual indicates this also happens with the MS-Windows drivers.

The server requires at least a 64KB scratchpad (16KB for XGA's). Additional memory is useful for font cache and a larger scratchpad.

AGX Clocks:

Probing is supported, but of course the usual warnings and disclaimers apply. Probing may momentarily subject your monitor to sweep frequencies in excess of its rating. The cautious may wish to turn off the monitor while the probe is running.

Once clocks are known, they can be entered into XF86Config, then subsequent runs won't probe clocks and will be quicker to startup. For the clock probe it is recommended that the X server be run with the -probeonly option. The values in the clocks statement are the hardware input clocks and correspond to the pixel clock only at 8bpp in direct-clocking RAMDAC modes. The server will divide/multiply those values as appropriate for the RAMDAC modes available at the current pixel depth. The available pixel clocks will be displayed in the startup messages.

For the 2MB Hercules Graphites, with the "herc-dual-dac" RAMDAC specified, earlier versions of the server generated an additional 16 clocks with values doubled and some zeroed. Those are no longer needed and you should re-probe and re-enter the clock values to ensure all clocks are available to you.

The AGX-015 2MB Hercules Graphite VL Pro with an ICS1494M 9251-516 clock chip has probed clock values of:

               25.18  28.80  32.70  36.00  40.00  45.00  50.40  64.70
               70.10  76.10  80.60  86.30  90.40  95.90 100.70 109.40
Actual values according to Hercules are:
               25.175 28.322 32.512 36.000 40.00 44.90 50.35 65.00
               70.00  75.00  80.00  85.00  90.00 95.00 100.0 108.0
These are the values to be used in the clock statement if specifying the "normal", "bt481", or "herc_small_dac" RAMDAC in your XF86Config and your clockchip matches that above.

Clock probing assumes that the first clock is 25.175Mhz and uses that to derive the rest. A warning is displayed if the second is not near 28.322Mhz. If this warning appears, you should not use the probed clock values without additional verification from other sources.

In the case of the AGX-014 and later AGX's, only the external clock select lines are used, this means the clock values correspond to the values of the video board's clock chip.

For the AGX-010, the first 8 clocks use the standard XGA internal clock selects and the second 8 are based on AGX extensions. For the XGA-1 only 8 clocks are available. The XGA-2 uses a programmable clock and no clocks or clockchip line is required.

The maximum pixel clock generally allowed is 85MHz, but some RAMDACs support higher values. In any case you, should check your RAMDAC, some RAMDACs used on AGX based boards are produced in versions rated to lesser values than the server assumes. You should check the rating and limit yourself to that value.


One difference I've noted from the Mach8, is that the AGX's CRTC doesn't like the start of the horizontal sync to be equal to horiz blank start (vert sync may have the same problem, I need to test some more). Interlaced and +/-sync flags are supported but have had very little testing. For interlaced modes make sure the number of lines is an odd number.

The doublescan flag is now supported, however the minimum clock supported is generally 25MHz, so resolutions of less than 400x300 are not likely to be supported by most monitors. In creating doublescan mode timings, the vertical timings will match the apparent resolutions, e.g. for 400x300 the timings should describe 300 lines, not 600.


For the Hercules HG720 (2MB VLB AGX-015, with BT481 and AT&T20C5050 RAMDACs), I use the following XF86Config "Device" section:

             Section "Device"
                 Identifier "HG720"
                 VendorName "Hercules"
                 BoardName  "Graphite VL Pro"
                 Chipset    "AGX-015"
                 Clocks     25.2  28.3  32.5  36.0  40.0  45.0  50.4  65.0
                            70.00  75.00  80.00  85.00  90.00 95.00 100.0 108.0
                 Videoram   2048
                 RamDac     "herc_dual_dac"
                 Option     "dac_8_bit"
                 Option     "no_wait_state"
For the Spider Black Widow Plus (2MB VLB AGX-016, with Sierra SC15021 RAMDAC):
             Section "Device"
                 Identifier "SBWP"
                 VendorName "Spider"
                 BoardName  "Black Widow Plus"
                 Chipset    "AGX-016"
                 Clocks      25.2  28.3  39.9  72.2  50.0  76.9  36.1  44.8
                             89.0  119.8 79.9  31.5 110.0  64.9  74.9  94.9
                 Videoram   2048
                 RamDac     "SC15025"
                 Option     "dac_8_bit"
                 Option     "no_wait_state"

Notes on the AGX Server : XF86Config
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Next: Xga configuration