The following options are of particular interest to the Oak driver. Each
of them must be specified in the 'svga' driver section of the
XF86Config file, within the Screen subsections to which they
applicable (you can enable options for all depths by specifying them in
This option enables a linear framebuffer at 0xE00000 (14Mb) for
cards recognized as ISA by the probe. Cards that are VLB will
map the framebuffer at 0x4E00000. The aperture depends
on the VideoRam parameter in the
XF86Config file or on
the probed value for the board. It will speed up performance by
about 15% on a VLB-based boards for a DX2-66 486.
Sometimes a motherboard will not be able to map at 0x4E00000, and then linear mode will not work with more than 14 Mbytes of main RAM. I know this because mine doesn't.
This option will cause the command FIFO threshold of the chipset to be set at 0 instructions, which should be optimal for 16-bit data transfers, as empirical use of different thresholds, with xbench, show. Expect a 5-10% of performance boost on a DX2-66 486.
This option will set the FIFO to a safe value of 14, slowing the board by a 50%, use this only if you experience streaks or anomalies on the screen.
This option will enable an internal cache on the board that will be used as a rudimentary bitblt engine. Performance boost is more or less 100%, (double BlitStones on xbench). Most OTI087 boards seem to have this feature broken, corrupting text from xterms and leaving mouse droppings throughout the screen. As a rule of thumb, enable it, if it works badly, disable it.
This one will force the internal speed to 50 Mhz.
This one will force the internal speed to 66 Mhz, speeding up performance of the chipset.
Sets the VLB interface to no wait states. On a medium VLB board (mine is VLB/PCI, so its not a very fast one) in VLB transparent mode, it manages up to 16 Mbytes/second transfer rate through the bus.
Makes the VLB interface to add one wait state to the first read or write of a given burst.
Similar to the previous one, this only inserts a wait state in the first 'write' of a given burst. reads are not affected. This is the default behaviour of the server.
This configures the VLB interface to add one wait state to each write cycle.
This configures the VLB interface to add one wait state to each read cycle.
Enables the slowest VLB transfer adding wait states in all cases. Hopefully, no board will need this enabled.
Sets the VLB interface to at least one wait state.
One accelerated routine has been lately added to the driver, allowing it to draw solid fills quite faster. This routine only works (up to date) on segmented addressing, and only if the virtual width is 1024. This option is automatically enabled by the driver. Use this option if you want to disable it.
As a rule of thumb, use the option "no_wait", and if it doesn't result in corrupting text, lucky you. If not, try "first_wwait", and downwards. ISA card owners should not use these options.